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Microchip Technology, in Collaboration With Micron Technology, Demonstrates High-Performance PCIe® Gen 6 Storage Architecture for AI and Data Centre Infrastructure

August 6, 2026
Reading Time: 2 mins read
Microchip Technology, in Collaboration With Micron Technology, Demonstrates High-Performance PCIe® Gen 6 Storage Architecture for AI and Data Centre Infrastructure
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Microchip Technology has announced a demonstration showcasing an end‑to‑end PCIe® Gen 6 storage architecture, combining Microchip’s Switchtec™ PCIe Gen 6 switches with high-performance Micron 9650 NVMe® solid state drives (SSDs). The demonstration highlights the role of next‑generation PCIe technology in enabling higher data throughput, reduced latency and scalable connectivity for AI, high‑performance computing (HPC) and cloud data centre workloads.

At the 2026 Future of Memory and Storage (FMS) Conference, the demonstration features a Microchip Switchtec Gen 6 PCIe fanout switch acting as a high‑bandwidth, low‑latency interconnect between host processors and multiple Micron 9650 SSDs enabling the drives to operate at the full potential of Gen 6 speed. The architecture supports composable and disaggregated system designs, allowing data centre architects to scale storage resources efficiently while maintaining predictable performance.

“Advancing data centre performance is not solved by any single component and our work with Micron highlights the importance of taking a cohesive approach,” said Brian McCarson, corporate vice president and GM of Microchip’s data centre solutions business unit. “We’re bringing together complementary strengths in switching and storage to demonstrate how a well‑aligned ecosystem can enable scalable, high‑bandwidth architectures for next‑generation AI and cloud platforms.”

As AI models grow in size and complexity, data centres must move increasingly large volumes of data across compute, memory and storage resources. PCIe 6.0 helps address this challenge by doubling PCIe 5.0 bandwidth to 64 GT/s (giga transfers per second) per lane, delivering the sustained throughput required for demanding AI workloads.

“AI infrastructure is entering a new era in which storage performance and ecosystem interoperability must advance in lockstep,” said Larry Hart, senior director of solutions marketing for Micron’s Core Data Centre Business Unit. “Together, the Micron 9650 SSD, the industry’s first mass-produced PCIe Gen 6 SSD, and Microchip’s Switchtec PCIe Gen 6 switching technology demonstrate how a scalable storage architecture can help data centres achieve higher throughput, lower latency and more efficient data movement for next-generation AI, HPC and cloud workloads.”

Microchip’s Switchtec Gen 6 PCIe switches are built on 3 nm process technology and support high lane counts, advanced error containment, comprehensive diagnostics and multicast functionality that enables efficient one-to-many data distribution across devices within a PCIe domain. The switches enable high-speed connectivity between CPUs, GPUs, SoCs, AI accelerators and storage devices while helping optimize power consumption in demanding computing environments. These capabilities help ensure reliable data movement and system resilience in AI and cloud infrastructure. To help protect system integrity, the switches incorporate a hardware root of trust and secure boot architecture supported by post-quantum-safe cryptographic algorithms that meet CNSA 2.0 security standards.

Micron 9650 PCIe Gen 6 NVMe SSDs are designed to deliver exceptional throughput, IOPS and latency characteristics required for data‑intensive workloads such as AI training, real‑time analytics and large‑scale databases. By combining Micron’s storage technology with Microchip’s switching capability, the solution demonstrates a balanced, high‑performance storage fabric optimized for next‑generation platforms. Visit the website to learn more about Microchip’s full portfolio of data centre solutions.

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